I decided to interrupt my Cyclone II Handbook dissection series in order to build the voltage regulators needed for the Saturn Project.

The EP2C8 Cyclone II FPGA we have on our breakout board requires nine voltage supplies:

From the Cyclone® II EP2C8 & EP2C8A Device Pin-Out document

Fortunately we can minimize the overall number of voltage regulators required by using a single regulator for the 1.2V supplies, and another regulator for the I/O supplies. I have some concern about noise coupling between the different analog and digital supplies, though our breakout board does have some decoupling capacitors. I’m thinking this should be adequate for our prototyping setup.

Breakout Board Voltage Supplies Schematic

For future reference, the Altera Cyclone II Handbook has some guidelines for isolating the PLL power supplies at the PCB level:

Isolate the power connected to VCCA from the power to the rest of the Cyclone II device or any other digital device on the board. You can use one of three different methods of isolating the VCCA pin:

• Use separate VCCA power planes
• Use a partitioned VCCA island within the VCCINT plane
• Use thick VCCA traces

I decided to pick up a SMPS wall-wart to step down and rectify the mains (120VAC) to 9VDC. The clock I picked out happens to need a 5V supply, so the 9V wall-wart is then connected to a 5V Breadboard power supply from SparkFun. (Plus, having a 5V rail will no doubt come in handy some day).

After selecting the components mentioned above, I moved on to select two linear regulators to supply the 1.2V and 3.3V, both of which are powered from the 5V Breadboard Power Supply. My main design goal for these regulators was to minimize the component count for simplicity sake. Have a look at the schematic below, and you can see I only needed 4 caps and a resistor.

Saturn Project - Regulator Schematic

I used a LT1084-3.3, and a LT3080.

The 1.2V regulator can draw up to 1.1A, and it doesn’t require a heat sink (Although, I might add one depending on how hot it gets). It has less than 1mV load regulation and <0.001%/V line regulation. One important thing to note is that this regulator has a minimum of 500uA output current required for proper operation. If you don’t meet this constraint, the output will swing to ~3.3V and possibly damage the FPGA. For the time being I decided to stick a 1kohm resistor on the output to sink 1.2mA just to be safe. Since I’m still in the prototyping phase I can’t be certain of the regulator start-up sequence, or what the quiescent current consumption of the VCCINT rail will be.

There isn’t anything too exciting about the 3.3V regulator, Linear Technology claims “higher efficiency” than other products on the market. It can supply up to 5A, which should be more than enough juice to power our FPGA and other fun circuits down the line.

Using LTSpice (a free, awesome, circuit simulator tool), I put together the schematic shown above, and I’ve made it available for download. I recommend playing around with it, try removing the load on the 1.2V regulator and watch what happens to the output. You will probably need to “install” the LM317 spice model which I’ve included (check out the readme.txt file for instructions).

Download the LTSpice Power Supply Schematic:

SaturnProject – Power Supply Schematic
(SaturnProject_PowerSupply.zip)
Includes the LM317 SPICE model.

Now that we’ve covered all the details, let’s get some satisfaction and check out the regulators in action!

Once I get to the point where I put together a custom PCBA, I’m sure I will revisit the regulator design and put together a more robust solution with surface mount components. Including some circuits to protect against over/under voltage situations, spikes, and accidental shorts, but in the mean time… we’re in business!

Next week I’ll show you the system clock I selected, and return to my handbook dissection and see what it takes to download a configuration file to the Cyclone II and start putting it to work. I’ll also put together a full bill of materials (BOM) so you can pick up all the components I’ve been talking about.

Another note for future reference…. Each of the CII supplies use more than one pin, here is a list of the those pins (so I don’t try to use them for I/O later and blow up the FPGA )

• VCCINT – Pin 32, 66, 79, 120, 178, 190,
• VCCIO1 – Pin 7, 29, 42
• VCCIO2 – Pin 166, 172, 183, 194, 202
• VCCIO3 – Pin 109, 122, 136, 148
• VCCIO4 – Pin 62, 71, 83, 91, 98
• VCCA_PLL1 – Pin 53, (54 – GND_A)
• VCCD_PLL1 – Pin 51, (50, 52 – GND_D)
• VCCA_PLL2 – Pin 157, (158 – GND_A)
• VCCD_PLL2 – Pin 155, (154, 156 – GND_D)